CQ Publishing FPGA magazine No. 18

We will explain the architecture of the new open source CPU "RISC-V", which has been attracting attention recently, while comparing it with CPUs such as ARM. In the second half, we will implement it on two FPGAs, MAX10 and Artix-7, run a sample program, add custom instructions, and evaluate its performance. Table of Contents Special Feature Google also recommends new open source CPU RISC-V making prologue Why RISC-V is attracting attention Chapter 1 This is refreshing! Current situation surrounding RISC-V Chapter 2 First RISC-V architecture Chapter 3 We Examination of RISC-V specifications Appendix1 Practice of HDL description of RISC-V core Chapter 4 Implementation of RISC-V on FPGA Appendix2 Operation check by RISC-V verification test program Chapter 5 Our RISC-V program Creation Chapter 6 Adding Custom Instructions to RISC-V Appendix3 Building a Hardware & Software Development Environment Special Feature Invitation to the Related Design Solution Forum To run C described as software as hardware, the latest technology Cyclone V SoC is installed. Introducing the latest board "DE10-Nano"! (Setup) Introducing Xilinx's RFSoC that realizes software radio Issues of power supply for high-performance FPGA and advantages of digitally controlled power supply Technical explanation Outline of MIPI PHY standard Large-capacity SATA storage from Linux Direct access to MAX10-FB LCD & camera to try with FB board compatible expansion board Appeared from MIPS head family Column FPGA deep learning practice social gathering "PDF version" FPGA magazine information Reader present